Conventional switching dc-dc converter controls are typically limited to bandwidths that are a fraction of their switching frequency. Even advanced geometric controls are generally limited by an internal slew rate of the dc-dc converter, which represents a maximum rate of change of a signal at any point in the dc-dc converter.
In conventional switching dc-dc power converters, performance is constrained by the designer to conform to models used for control analysis and design. Averaging methods, for example, presuppose switching action that is much faster than system dynamics. Small-signal models, which must be based on averaging methods since dc-dc converters can not be linearized, typically support designs for dynamic response only up to a fraction of the switching frequency.
Conventional controls use the switch duty ratio as the actuation process for closed-loop control. As is well known, a pulse-width modulation (PWM) process is a convenient way to interface a duty ratio controller with a switching converter. Disturbances, such as line and load changes, cannot be addressed more quickly than the dynamic limitations of these controllers.
Geometric controls, in contrast, work directly with dynamics. Burns et al., in “Analytic Derivation and Evaluation of a State—Trajectory Control Law for DC-to-DC controllers,” published in Record, IEEE Power Electronics Specialists Conference, 1977, and Bass et al., in “State-Plane Animation of Power Electronic System: A Tool for Understanding Feedback Control and Stability,” published in Proceedings, IEEE Applied Power Electronics Conference, 1980, introduced several types of geometric controls for dynamic behavior. Mossoba et al., in “Null Audio Susceptibility of Current Mode Buck Converters: Small Signal and Large Signal Perspectives,” published in Proceedings, IEEE Power Electronics Specialists Conference, 2003, introduced designs that yield deadbeat responses to line disturbances for some classes of converters.
Modern needs for fast dynamic performance are generally motivated by fast microprocessor loads. In typical implementations, the dynamic response is enhanced by raising the switching frequency or using multiphase designs. Beyond small-signal methods, Sanders, in “Design of Ceramic-Capacitor VRMs (Voltage Regular Module) with Estimated Load Current Feedforward,” published in Proceedings, IEEE Power Electronics Specialists Conference, 2005, showed how to apply controls that enhance dynamics, while other researchers have concentrated on the implementation of active filters for this purpose.
Converter slew rates limit the ultimate performance of known geometric controls. Since voltages and currents are subject to pre-determined limits in a converter, the rates of change of inductor currents and capacitor voltages are limited in well-defined ways. Obviously the dynamic response of a converter can be enhanced with smaller inductors and capacitors and higher switching frequencies, but other design considerations and losses place practical limits on this strategy. In the end, dynamic response of any dc-dc converter is limited by physical design considerations and constraints. As such, a tradeoff is typically considered, e.g., an inductor selected to achieve a certain ripple current inherently limits the rate of change of the load current.
In addition, fast dc-dc dynamic performance is crucial for supplying clean power to dynamic loads. This is a particular concern in low-voltage digital systems, such as microprocessors, in which fast, high-current load steps can lead to significant transients. A transient, which is a response to an imposed change, called a disturbance, is a signal that takes time to recover to the desired value, and may overshoot or undershoot the desired steady-state values. These transients often are dominated by the need to change energy stored in the power converter inductor. Disturbances have become more and more significant with higher demands from modern processors.
In the literature, a number of solutions have been proposed for reducing load-induced transients at different system levels. At the top system level, a bulk supply powers multiple loads. At the bottom system level, converters deliver power in cascade with voltage regulator modules (VRM) and point-of-load (POL) converters. A typical method to improve transient response at both system levels is to increase values of capacitance, either in the power stage or in output filters at the final load. Generally, filters need to carry the nominal power of the system and must store enough energy storage to handle worst-case load steps. However, this method tends to reduce closed-loop bandwidths and may produce voltage spikes induced by resonant loops between the output filter, supply, and conductors leading to POL converters.
Distributed power architectures, when they apply, resolve some of these issues. In a typical distributed architecture, power supplies are split into smaller modules and placed near the loads. This strategy may reduce the source-to-load impedance and the required energy storage capacity. These smaller modules regulate independently and are controlled to reject local load disturbances to the extent possible in conventional control designs. A design challenge is to reject disturbances without sacrificing bandwidth, i.e., prevent load or line changes from affecting the output, while at the same time supporting fast changes to the output voltage and current. These have presented counteracting goals in the prior art.
Moreover, most controllers typically operate without knowledge of corresponding loads, which is information that could provide advantages for controllers intended to improve transient response. The opportunity for operating with knowledge of load behavior is increasing, as more intelligent loads enter use. Efforts to reduce energy consumption and manage heat have led to a new class of deterministic loads. Even with substantial load knowledge, performance may be limited by the power converter topology. Storage elements create bottlenecks that limit converter performance. For example, in a buck converter topology, all energy must first pass through the inductor and exit through the load. Any change that requires more stored energy must first increase the inductor energy, while any change that requires less energy uses the load to remove the excess.
Various alterations to the basic dc-dc topologies have been suggested to circumvent this issue. Current sharing with interleaved or parallel converters reduces the inductance of the converter and increases conduction paths to the output. Parallel converters provide advantages similar to distributed power architectures mentioned earlier, but they share a single regulation point. Another alteration involves bypassing storage elements. This can increase power flow and, thus, dynamic response at the load. Added conduction paths have been proposed and given names such as active clamps, single shot transient suppressors (SSTS), and active filters. The addition of linear regulators in parallel with the output is equivalent to the active clamp approach. Conduction path alteration only needs to handle transient power, but does not fundamentally alter stored energy. In the sense the altered paths do not provide explicit dynamic control of stored energy changes, their impact on transient response is indirect.
Therefore, a need exists for a method and apparatus for providing fast converter controls that directly manage changes in stored energy. Methods based on geometric control techniques need to be enhanced with converter augmentation to circumvent dynamic limits to fast transient response, thereby overcoming the problems noted above and others previously experienced. These and other needs will become apparent to those of skill in the art after reading the present specification.